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<h1>sramswconf.h</h1><a href="sramswconf_8h.html">Go to the documentation of this file.</a><div class="fragment"><pre class="fragment">00001 <span class="comment">/*! \file sramswconf.h \brief Software-driven SRAM memory bus access configuration. */</span>
00002 <span class="comment">//*****************************************************************************</span>
00003 <span class="comment">//</span>
00004 <span class="comment">// File Name : 'sramswconf.h'</span>
00005 <span class="comment">// Title : Software-driven SRAM memory bus access functions</span>
00006 <span class="comment">// Author : Pascal Stang - Copyright (C) 2002</span>
00007 <span class="comment">// Created : 11/11/2002</span>
00008 <span class="comment">// Revised : 11/13/2002</span>
00009 <span class="comment">// Version : 1.0</span>
00010 <span class="comment">// Target MCU : Atmel AVR series</span>
00011 <span class="comment">// Editor Tabs : 4</span>
00012 <span class="comment">//</span>
00013 <span class="comment">// This code is distributed under the GNU Public License</span>
00014 <span class="comment">// which can be found at http://www.gnu.org/licenses/gpl.txt</span>
00015 <span class="comment">//</span>
00016 <span class="comment">//*****************************************************************************</span>
00017
00018 <span class="preprocessor">#ifndef SRAMSWCONF_H</span>
00019 <span class="preprocessor"></span><span class="preprocessor">#define SRAMSWCONF_H</span>
00020 <span class="preprocessor"></span>
00021 <span class="comment">// defines</span>
00022
00023 <span class="comment">// data bus (DATA[0:7]) and low address (ADDR[0:7]) port</span>
00024 <span class="preprocessor">#define SRAM_ADL PORTA</span>
00025 <span class="preprocessor"></span><span class="preprocessor">#define SRAM_ADL_DDR DDRA</span>
00026 <span class="preprocessor"></span><span class="preprocessor">#define SRAM_ADL_IN PINA</span>
00027 <span class="preprocessor"></span><span class="comment">// high address port (ADDR[8:15])</span>
00028 <span class="preprocessor">#define SRAM_AH PORTC</span>
00029 <span class="preprocessor"></span><span class="preprocessor">#define SRAM_AH_DDR DDRC</span>
00030 <span class="preprocessor"></span><span class="comment">// page address port (PAGE[0:3])</span>
00031 <span class="preprocessor">#define SRAM_PAGE PORTB</span>
00032 <span class="preprocessor"></span><span class="preprocessor">#define SRAM_PAGE_DDR DDRB</span>
00033 <span class="preprocessor"></span><span class="preprocessor">#define SRAM_PAGE_MASK 0x0F</span>
00034 <span class="preprocessor"></span><span class="comment">// control port</span>
00035 <span class="preprocessor">#define SRAM_CTRL PORTD</span>
00036 <span class="preprocessor"></span><span class="preprocessor">#define SRAM_CTRL_DDR DDRD</span>
00037 <span class="preprocessor"></span><span class="comment">// control lines</span>
00038 <span class="preprocessor">#define SRAM_ALE PD5</span>
00039 <span class="preprocessor"></span><span class="preprocessor">#define SRAM_WR PD6</span>
00040 <span class="preprocessor"></span><span class="preprocessor">#define SRAM_RD PD7</span>
00041 <span class="preprocessor"></span>
00042 <span class="preprocessor">#endif</span>
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