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| 1 | 6 | kaklik | <!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN"> |
| 2 | <html><head><meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1"> |
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| 3 | <title>Procyon AVRlib: conf/encoderconf.h File Reference</title> |
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| 5 | </head><body> |
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| 6 | <!-- Generated by Doxygen 1.4.2 --> |
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| 7 | <div class="qindex"><a class="qindex" href="main.html">Main Page</a> | <a class="qindex" href="modules.html">Modules</a> | <a class="qindex" href="annotated.html">Data Structures</a> | <a class="qindex" href="dirs.html">Directories</a> | <a class="qindex" href="files.html">File List</a> | <a class="qindex" href="functions.html">Data Fields</a> | <a class="qindex" href="globals.html">Globals</a> | <a class="qindex" href="pages.html">Related Pages</a></div> |
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| 8 | <div class="nav"> |
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| 9 | <a class="el" href="dir_000000.html">conf</a></div> |
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| 10 | <h1>encoderconf.h File Reference</h1><hr><a name="_details"></a><h2>Detailed Description</h2> |
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| 11 | |||
| 12 | <p> |
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| 13 | Definition in file <a class="el" href="encoderconf_8h-source.html">encoderconf.h</a>. |
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| 14 | <p> |
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| 15 | |||
| 16 | <p> |
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| 17 | <a href="encoderconf_8h-source.html">Go to the source code of this file.</a><table border="0" cellpadding="0" cellspacing="0"> |
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| 18 | <tr><td></td></tr> |
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| 19 | <tr><td colspan="2"><br><h2>Defines</h2></td></tr> |
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| 20 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="a0" doxytag="encoderconf.h::NUM_ENCODERS"></a> |
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| 21 | #define </td><td class="memItemRight" valign="bottom"><b>NUM_ENCODERS</b> 2</td></tr> |
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| 22 | |||
| 23 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="a1" doxytag="encoderconf.h::ENC0_SIGNAL"></a> |
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| 24 | #define </td><td class="memItemRight" valign="bottom"><b>ENC0_SIGNAL</b> SIG_INTERRUPT0</td></tr> |
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| 25 | |||
| 26 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="a2" doxytag="encoderconf.h::ENC0_INT"></a> |
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| 27 | #define </td><td class="memItemRight" valign="bottom"><b>ENC0_INT</b> INT0</td></tr> |
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| 28 | |||
| 29 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="a3" doxytag="encoderconf.h::ENC0_ICR"></a> |
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| 30 | #define </td><td class="memItemRight" valign="bottom"><b>ENC0_ICR</b> MCUCR</td></tr> |
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| 31 | |||
| 32 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="a4" doxytag="encoderconf.h::ENC0_ISCX0"></a> |
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| 33 | #define </td><td class="memItemRight" valign="bottom"><b>ENC0_ISCX0</b> ISC00</td></tr> |
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| 34 | |||
| 35 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="a5" doxytag="encoderconf.h::ENC0_ISCX1"></a> |
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| 36 | #define </td><td class="memItemRight" valign="bottom"><b>ENC0_ISCX1</b> ISC01</td></tr> |
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| 37 | |||
| 38 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="a6" doxytag="encoderconf.h::ENC0_PHASEA_PORT"></a> |
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| 39 | #define </td><td class="memItemRight" valign="bottom"><b>ENC0_PHASEA_PORT</b> PORTD</td></tr> |
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| 40 | |||
| 41 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="a7" doxytag="encoderconf.h::ENC0_PHASEA_DDR"></a> |
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| 42 | #define </td><td class="memItemRight" valign="bottom"><b>ENC0_PHASEA_DDR</b> DDRD</td></tr> |
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| 43 | |||
| 44 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="a8" doxytag="encoderconf.h::ENC0_PHASEA_PORTIN"></a> |
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| 45 | #define </td><td class="memItemRight" valign="bottom"><b>ENC0_PHASEA_PORTIN</b> PIND</td></tr> |
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| 46 | |||
| 47 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="a9" doxytag="encoderconf.h::ENC0_PHASEA_PIN"></a> |
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| 48 | #define </td><td class="memItemRight" valign="bottom"><b>ENC0_PHASEA_PIN</b> PD2</td></tr> |
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| 49 | |||
| 50 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="a10" doxytag="encoderconf.h::ENC0_PHASEB_PORT"></a> |
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| 51 | #define </td><td class="memItemRight" valign="bottom"><b>ENC0_PHASEB_PORT</b> PORTC</td></tr> |
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| 52 | |||
| 53 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="a11" doxytag="encoderconf.h::ENC0_PHASEB_DDR"></a> |
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| 54 | #define </td><td class="memItemRight" valign="bottom"><b>ENC0_PHASEB_DDR</b> DDRC</td></tr> |
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| 55 | |||
| 56 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="a12" doxytag="encoderconf.h::ENC0_PHASEB_PORTIN"></a> |
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| 57 | #define </td><td class="memItemRight" valign="bottom"><b>ENC0_PHASEB_PORTIN</b> PINC</td></tr> |
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| 58 | |||
| 59 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="a13" doxytag="encoderconf.h::ENC0_PHASEB_PIN"></a> |
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| 60 | #define </td><td class="memItemRight" valign="bottom"><b>ENC0_PHASEB_PIN</b> PC0</td></tr> |
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| 61 | |||
| 62 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="a14" doxytag="encoderconf.h::ENC1_SIGNAL"></a> |
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| 63 | #define </td><td class="memItemRight" valign="bottom"><b>ENC1_SIGNAL</b> SIG_INTERRUPT1</td></tr> |
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| 64 | |||
| 65 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="a15" doxytag="encoderconf.h::ENC1_INT"></a> |
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| 66 | #define </td><td class="memItemRight" valign="bottom"><b>ENC1_INT</b> INT1</td></tr> |
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| 67 | |||
| 68 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="a16" doxytag="encoderconf.h::ENC1_ICR"></a> |
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| 69 | #define </td><td class="memItemRight" valign="bottom"><b>ENC1_ICR</b> MCUCR</td></tr> |
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| 70 | |||
| 71 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="a17" doxytag="encoderconf.h::ENC1_ISCX0"></a> |
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| 72 | #define </td><td class="memItemRight" valign="bottom"><b>ENC1_ISCX0</b> ISC10</td></tr> |
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| 73 | |||
| 74 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="a18" doxytag="encoderconf.h::ENC1_ISCX1"></a> |
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| 75 | #define </td><td class="memItemRight" valign="bottom"><b>ENC1_ISCX1</b> ISC11</td></tr> |
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| 76 | |||
| 77 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="a19" doxytag="encoderconf.h::ENC1_PHASEA_PORT"></a> |
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| 78 | #define </td><td class="memItemRight" valign="bottom"><b>ENC1_PHASEA_PORT</b> PORTD</td></tr> |
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| 79 | |||
| 80 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="a20" doxytag="encoderconf.h::ENC1_PHASEA_PORTIN"></a> |
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| 81 | #define </td><td class="memItemRight" valign="bottom"><b>ENC1_PHASEA_PORTIN</b> PIND</td></tr> |
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| 82 | |||
| 83 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="a21" doxytag="encoderconf.h::ENC1_PHASEA_DDR"></a> |
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| 84 | #define </td><td class="memItemRight" valign="bottom"><b>ENC1_PHASEA_DDR</b> DDRD</td></tr> |
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| 85 | |||
| 86 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="a22" doxytag="encoderconf.h::ENC1_PHASEA_PIN"></a> |
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| 87 | #define </td><td class="memItemRight" valign="bottom"><b>ENC1_PHASEA_PIN</b> PD3</td></tr> |
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| 88 | |||
| 89 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="a23" doxytag="encoderconf.h::ENC1_PHASEB_PORT"></a> |
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| 90 | #define </td><td class="memItemRight" valign="bottom"><b>ENC1_PHASEB_PORT</b> PORTC</td></tr> |
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| 91 | |||
| 92 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="a24" doxytag="encoderconf.h::ENC1_PHASEB_DDR"></a> |
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| 93 | #define </td><td class="memItemRight" valign="bottom"><b>ENC1_PHASEB_DDR</b> DDRC</td></tr> |
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| 94 | |||
| 95 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="a25" doxytag="encoderconf.h::ENC1_PHASEB_PORTIN"></a> |
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| 96 | #define </td><td class="memItemRight" valign="bottom"><b>ENC1_PHASEB_PORTIN</b> PINC</td></tr> |
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| 97 | |||
| 98 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="a26" doxytag="encoderconf.h::ENC1_PHASEB_PIN"></a> |
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| 99 | #define </td><td class="memItemRight" valign="bottom"><b>ENC1_PHASEB_PIN</b> PC1</td></tr> |
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| 100 | |||
| 101 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="a27" doxytag="encoderconf.h::ENC2_INT"></a> |
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| 102 | #define </td><td class="memItemRight" valign="bottom"><b>ENC2_INT</b> INT6</td></tr> |
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| 103 | |||
| 104 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="a28" doxytag="encoderconf.h::ENC2_ICR"></a> |
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| 105 | #define </td><td class="memItemRight" valign="bottom"><b>ENC2_ICR</b> EICRB</td></tr> |
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| 106 | |||
| 107 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="a29" doxytag="encoderconf.h::ENC2_ISCX0"></a> |
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| 108 | #define </td><td class="memItemRight" valign="bottom"><b>ENC2_ISCX0</b> ISC60</td></tr> |
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| 109 | |||
| 110 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="a30" doxytag="encoderconf.h::ENC2_ISCX1"></a> |
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| 111 | #define </td><td class="memItemRight" valign="bottom"><b>ENC2_ISCX1</b> ISC61</td></tr> |
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| 112 | |||
| 113 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="a31" doxytag="encoderconf.h::ENC2_PHASEA_PORT"></a> |
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| 114 | #define </td><td class="memItemRight" valign="bottom"><b>ENC2_PHASEA_PORT</b> PORTE</td></tr> |
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| 115 | |||
| 116 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="a32" doxytag="encoderconf.h::ENC2_PHASEA_PORTIN"></a> |
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| 117 | #define </td><td class="memItemRight" valign="bottom"><b>ENC2_PHASEA_PORTIN</b> PINE</td></tr> |
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| 118 | |||
| 119 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="a33" doxytag="encoderconf.h::ENC2_PHASEA_DDR"></a> |
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| 120 | #define </td><td class="memItemRight" valign="bottom"><b>ENC2_PHASEA_DDR</b> DDRE</td></tr> |
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| 121 | |||
| 122 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="a34" doxytag="encoderconf.h::ENC2_PHASEA_PIN"></a> |
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| 123 | #define </td><td class="memItemRight" valign="bottom"><b>ENC2_PHASEA_PIN</b> PE6</td></tr> |
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| 124 | |||
| 125 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="a35" doxytag="encoderconf.h::ENC2_PHASEB_PORT"></a> |
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| 126 | #define </td><td class="memItemRight" valign="bottom"><b>ENC2_PHASEB_PORT</b> PORTC</td></tr> |
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| 127 | |||
| 128 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="a36" doxytag="encoderconf.h::ENC2_PHASEB_DDR"></a> |
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| 129 | #define </td><td class="memItemRight" valign="bottom"><b>ENC2_PHASEB_DDR</b> DDRC</td></tr> |
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| 130 | |||
| 131 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="a37" doxytag="encoderconf.h::ENC2_PHASEB_PORTIN"></a> |
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| 132 | #define </td><td class="memItemRight" valign="bottom"><b>ENC2_PHASEB_PORTIN</b> PINC</td></tr> |
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| 133 | |||
| 134 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="a38" doxytag="encoderconf.h::ENC2_PHASEB_PIN"></a> |
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| 135 | #define </td><td class="memItemRight" valign="bottom"><b>ENC2_PHASEB_PIN</b> PC2</td></tr> |
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| 136 | |||
| 137 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="a39" doxytag="encoderconf.h::ENC3_INT"></a> |
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| 138 | #define </td><td class="memItemRight" valign="bottom"><b>ENC3_INT</b> INT7</td></tr> |
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| 139 | |||
| 140 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="a40" doxytag="encoderconf.h::ENC3_ICR"></a> |
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| 141 | #define </td><td class="memItemRight" valign="bottom"><b>ENC3_ICR</b> EICRB</td></tr> |
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| 142 | |||
| 143 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="a41" doxytag="encoderconf.h::ENC3_ISCX0"></a> |
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| 144 | #define </td><td class="memItemRight" valign="bottom"><b>ENC3_ISCX0</b> ISC70</td></tr> |
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| 145 | |||
| 146 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="a42" doxytag="encoderconf.h::ENC3_ISCX1"></a> |
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| 147 | #define </td><td class="memItemRight" valign="bottom"><b>ENC3_ISCX1</b> ISC71</td></tr> |
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| 148 | |||
| 149 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="a43" doxytag="encoderconf.h::ENC3_PHASEA_PORT"></a> |
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| 150 | #define </td><td class="memItemRight" valign="bottom"><b>ENC3_PHASEA_PORT</b> PORTE</td></tr> |
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| 151 | |||
| 152 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="a44" doxytag="encoderconf.h::ENC3_PHASEA_PORTIN"></a> |
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| 153 | #define </td><td class="memItemRight" valign="bottom"><b>ENC3_PHASEA_PORTIN</b> PINE</td></tr> |
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| 154 | |||
| 155 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="a45" doxytag="encoderconf.h::ENC3_PHASEA_DDR"></a> |
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| 156 | #define </td><td class="memItemRight" valign="bottom"><b>ENC3_PHASEA_DDR</b> DDRE</td></tr> |
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| 157 | |||
| 158 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="a46" doxytag="encoderconf.h::ENC3_PHASEA_PIN"></a> |
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| 159 | #define </td><td class="memItemRight" valign="bottom"><b>ENC3_PHASEA_PIN</b> PE7</td></tr> |
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| 160 | |||
| 161 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="a47" doxytag="encoderconf.h::ENC3_PHASEB_PORT"></a> |
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| 162 | #define </td><td class="memItemRight" valign="bottom"><b>ENC3_PHASEB_PORT</b> PORTC</td></tr> |
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| 163 | |||
| 164 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="a48" doxytag="encoderconf.h::ENC3_PHASEB_DDR"></a> |
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| 165 | #define </td><td class="memItemRight" valign="bottom"><b>ENC3_PHASEB_DDR</b> DDRC</td></tr> |
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| 166 | |||
| 167 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="a49" doxytag="encoderconf.h::ENC3_PHASEB_PORTIN"></a> |
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| 168 | #define </td><td class="memItemRight" valign="bottom"><b>ENC3_PHASEB_PORTIN</b> PINC</td></tr> |
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| 169 | |||
| 170 | <tr><td class="memItemLeft" nowrap align="right" valign="top"><a class="anchor" name="a50" doxytag="encoderconf.h::ENC3_PHASEB_PIN"></a> |
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| 171 | #define </td><td class="memItemRight" valign="bottom"><b>ENC3_PHASEB_PIN</b> PC3</td></tr> |
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| 172 | |||
| 173 | </table> |
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| 174 | <hr size="1"><address style="align: right;"><small>Generated on Sun Oct 29 03:41:08 2006 for Procyon AVRlib by |
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| 175 | <a href="http://www.doxygen.org/index.html"> |
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| 176 | <img src="doxygen.png" alt="doxygen" align="middle" border="0"></a> 1.4.2 </small></address> |
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| 177 | </body> |
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| 178 | </html> |
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