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10 <h1>encoderconf.h</h1><a href="encoderconf_8h.html">Go to the documentation of this file.</a><div class="fragment"><pre class="fragment">00001 <span class="comment">/*! \file encoderconf.h \brief Quadrature Encoder driver configuration. */</span>
11 00002 <span class="comment">//*****************************************************************************</span>
12 00003 <span class="comment">//</span>
13 00004 <span class="comment">// File Name : 'encoderconf.h'</span>
14 00005 <span class="comment">// Title : Quadrature Encoder driver configuration</span>
15 00006 <span class="comment">// Author : Pascal Stang - Copyright (C) 2003-2004</span>
16 00007 <span class="comment">// Created : 2003.01.26</span>
17 00008 <span class="comment">// Revised : 2004.06.25</span>
18 00009 <span class="comment">// Version : 0.2</span>
19 00010 <span class="comment">// Target MCU : Atmel AVR Series</span>
20 00011 <span class="comment">// Editor Tabs : 4</span>
21 00012 <span class="comment">//</span>
22 00013 <span class="comment">// The default number of encoders supported is 2 because most AVR processors</span>
23 00014 <span class="comment">// have two external interrupts. To use more or fewer encoders, you must do</span>
24 00015 <span class="comment">// four things:</span>
25 00016 <span class="comment">//</span>
26 00017 <span class="comment">// 1. Use a processor with at least as many external interrutps as number of</span>
27 00018 <span class="comment">// encoders you want to have.</span>
28 00019 <span class="comment">// 2. Set NUM_ENCODERS to the number of encoders you will use.</span>
29 00020 <span class="comment">// 3. Comment/Uncomment the proper ENCx_SIGNAL defines for your encoders</span>
30 00021 <span class="comment">// (the encoders must be used sequentially, 0 then 1 then 2 then 3)</span>
31 00022 <span class="comment">// 4. Configure the various defines so that they match your processor and</span>
32 00023 <span class="comment">// specific hardware. The notes below may help.</span>
33 00024 <span class="comment">//</span>
34 00025 <span class="comment">//</span>
35 00026 <span class="comment">// -------------------- NOTES --------------------</span>
36 00027 <span class="comment">// The external interrupt pins are mapped as follows on most AVR processors:</span>
37 00028 <span class="comment">// (90s8515, mega161, mega163, mega323, mega16, mega32, etc)</span>
38 00029 <span class="comment">//</span>
39 00030 <span class="comment">// INT0 -&gt; PD2 (PORTD, pin 2)</span>
40 00031 <span class="comment">// INT1 -&gt; PD3 (PORTD, pin 3)</span>
41 00032 <span class="comment">//</span>
42 00033 <span class="comment">// The external interrupt pins on the processors mega128 and mega64 are:</span>
43 00034 <span class="comment">//</span>
44 00035 <span class="comment">// INT0 -&gt; PD0 (PORTD, pin 0)</span>
45 00036 <span class="comment">// INT1 -&gt; PD1 (PORTD, pin 1)</span>
46 00037 <span class="comment">// INT2 -&gt; PD2 (PORTD, pin 2)</span>
47 00038 <span class="comment">// INT3 -&gt; PD3 (PORTD, pin 3)</span>
48 00039 <span class="comment">// INT4 -&gt; PE4 (PORTE, pin 4)</span>
49 00040 <span class="comment">// INT5 -&gt; PE5 (PORTE, pin 5)</span>
50 00041 <span class="comment">// INT6 -&gt; PE6 (PORTE, pin 6)</span>
51 00042 <span class="comment">// INT7 -&gt; PE7 (PORTE, pin 7)</span>
52 00043 <span class="comment">//</span>
53 00044 <span class="comment">// This code is distributed under the GNU Public License</span>
54 00045 <span class="comment">// which can be found at http://www.gnu.org/licenses/gpl.txt</span>
55 00046 <span class="comment">//</span>
56 00047 <span class="comment">//*****************************************************************************</span>
57 00048
58 00049 <span class="preprocessor">#ifndef ENCODERCONF_H</span>
59 00050 <span class="preprocessor"></span><span class="preprocessor">#define ENCODERCONF_H</span>
60 00051 <span class="preprocessor"></span>
61 00052 <span class="comment">// constants/macros/typdefs</span>
62 00053
63 00054 <span class="comment">// defines for processor compatibility</span>
64 00055 <span class="comment">// quick compatiblity for mega128, mega64 </span>
65 00056 <span class="comment">//#ifndef MCUCR</span>
66 00057 <span class="comment">// #define MCUCR EICRA</span>
67 00058 <span class="comment">//#endif</span>
68 00059
69 00060 <span class="comment">// Set the total number of encoders you wish to support</span>
70 00061 <span class="preprocessor">#define NUM_ENCODERS 2</span>
71 00062 <span class="preprocessor"></span>
72 00063
73 00064 <span class="comment">// -------------------- Encoder 0 connections --------------------</span>
74 00065 <span class="comment">// Phase A quadrature encoder output should connect to this interrupt line:</span>
75 00066 <span class="comment">// *** NOTE: the choice of interrupt PORT, DDR, and PIN must match the external</span>
76 00067 <span class="comment">// interrupt you are using on your processor. Consult the External Interrupts</span>
77 00068 <span class="comment">// section of your processor's datasheet for more information.</span>
78 00069
79 00070 <span class="comment">// Interrupt Configuration</span>
80 00071 <span class="preprocessor">#define ENC0_SIGNAL SIG_INTERRUPT0 // Interrupt signal name</span>
81 00072 <span class="preprocessor"></span><span class="preprocessor">#define ENC0_INT INT0 // matching INTx bit in GIMSK/EIMSK</span>
82 00073 <span class="preprocessor"></span><span class="preprocessor">#define ENC0_ICR MCUCR // matching Int. Config Register (MCUCR,EICRA/B)</span>
83 00074 <span class="preprocessor"></span><span class="preprocessor">#define ENC0_ISCX0 ISC00 // matching Interrupt Sense Config bit0</span>
84 00075 <span class="preprocessor"></span><span class="preprocessor">#define ENC0_ISCX1 ISC01 // matching Interrupt Sense Config bit1</span>
85 00076 <span class="preprocessor"></span><span class="comment">// PhaseA Port/Pin Configuration</span>
86 00077 <span class="comment">// *** PORTx, DDRx, PINx, and Pxn should all have the same letter for "x" ***</span>
87 00078 <span class="preprocessor">#define ENC0_PHASEA_PORT PORTD // PhaseA port register</span>
88 00079 <span class="preprocessor"></span><span class="preprocessor">#define ENC0_PHASEA_DDR DDRD // PhaseA port direction register</span>
89 00080 <span class="preprocessor"></span><span class="preprocessor">#define ENC0_PHASEA_PORTIN PIND // PhaseA port input register</span>
90 00081 <span class="preprocessor"></span><span class="preprocessor">#define ENC0_PHASEA_PIN PD2 // PhaseA port pin</span>
91 00082 <span class="preprocessor"></span><span class="comment">// Phase B quadrature encoder output should connect to this direction line:</span>
92 00083 <span class="comment">// *** PORTx, DDRx, PINx, and Pxn should all have the same letter for "x" ***</span>
93 00084 <span class="preprocessor">#define ENC0_PHASEB_PORT PORTC // PhaseB port register</span>
94 00085 <span class="preprocessor"></span><span class="preprocessor">#define ENC0_PHASEB_DDR DDRC // PhaseB port direction register</span>
95 00086 <span class="preprocessor"></span><span class="preprocessor">#define ENC0_PHASEB_PORTIN PINC // PhaseB port input register</span>
96 00087 <span class="preprocessor"></span><span class="preprocessor">#define ENC0_PHASEB_PIN PC0 // PhaseB port pin</span>
97 00088 <span class="preprocessor"></span>
98 00089
99 00090 <span class="comment">// -------------------- Encoder 1 connections --------------------</span>
100 00091 <span class="comment">// Phase A quadrature encoder output should connect to this interrupt line:</span>
101 00092 <span class="comment">// *** NOTE: the choice of interrupt pin and port must match the external</span>
102 00093 <span class="comment">// interrupt you are using on your processor. Consult the External Interrupts</span>
103 00094 <span class="comment">// section of your processor's datasheet for more information.</span>
104 00095
105 00096 <span class="comment">// Interrupt Configuration</span>
106 00097 <span class="preprocessor">#define ENC1_SIGNAL SIG_INTERRUPT1 // Interrupt signal name</span>
107 00098 <span class="preprocessor"></span><span class="preprocessor">#define ENC1_INT INT1 // matching INTx bit in GIMSK/EIMSK</span>
108 00099 <span class="preprocessor"></span><span class="preprocessor">#define ENC1_ICR MCUCR // matching Int. Config Register (MCUCR,EICRA/B)</span>
109 00100 <span class="preprocessor"></span><span class="preprocessor">#define ENC1_ISCX0 ISC10 // matching Interrupt Sense Config bit0</span>
110 00101 <span class="preprocessor"></span><span class="preprocessor">#define ENC1_ISCX1 ISC11 // matching Interrupt Sense Config bit1</span>
111 00102 <span class="preprocessor"></span><span class="comment">// PhaseA Port/Pin Configuration</span>
112 00103 <span class="comment">// *** PORTx, DDRx, PINx, and Pxn should all have the same letter for "x" ***</span>
113 00104 <span class="preprocessor">#define ENC1_PHASEA_PORT PORTD // PhaseA port register</span>
114 00105 <span class="preprocessor"></span><span class="preprocessor">#define ENC1_PHASEA_PORTIN PIND // PhaseA port input register</span>
115 00106 <span class="preprocessor"></span><span class="preprocessor">#define ENC1_PHASEA_DDR DDRD // PhaseA port direction register</span>
116 00107 <span class="preprocessor"></span><span class="preprocessor">#define ENC1_PHASEA_PIN PD3 // PhaseA port pin</span>
117 00108 <span class="preprocessor"></span><span class="comment">// Phase B quadrature encoder output should connect to this direction line:</span>
118 00109 <span class="comment">// *** PORTx, DDRx, PINx, and Pxn should all have the same letter for "x" ***</span>
119 00110 <span class="preprocessor">#define ENC1_PHASEB_PORT PORTC // PhaseB port register</span>
120 00111 <span class="preprocessor"></span><span class="preprocessor">#define ENC1_PHASEB_DDR DDRC // PhaseB port direction register</span>
121 00112 <span class="preprocessor"></span><span class="preprocessor">#define ENC1_PHASEB_PORTIN PINC // PhaseB port input register</span>
122 00113 <span class="preprocessor"></span><span class="preprocessor">#define ENC1_PHASEB_PIN PC1 // PhaseB port pin</span>
123 00114 <span class="preprocessor"></span>
124 00115
125 00116 <span class="comment">// -------------------- Encoder 2 connections --------------------</span>
126 00117 <span class="comment">// Phase A quadrature encoder output should connect to this interrupt line:</span>
127 00118 <span class="comment">// *** NOTE: the choice of interrupt pin and port must match the external</span>
128 00119 <span class="comment">// interrupt you are using on your processor. Consult the External Interrupts</span>
129 00120 <span class="comment">// section of your processor's datasheet for more information.</span>
130 00121
131 00122 <span class="comment">// Interrupt Configuration</span>
132 00123 <span class="comment">//#define ENC2_SIGNAL SIG_INTERRUPT6 // Interrupt signal name</span>
133 00124 <span class="preprocessor">#define ENC2_INT INT6 // matching INTx bit in GIMSK/EIMSK</span>
134 00125 <span class="preprocessor"></span><span class="preprocessor">#define ENC2_ICR EICRB // matching Int. Config Register (MCUCR,EICRA/B)</span>
135 00126 <span class="preprocessor"></span><span class="preprocessor">#define ENC2_ISCX0 ISC60 // matching Interrupt Sense Config bit0</span>
136 00127 <span class="preprocessor"></span><span class="preprocessor">#define ENC2_ISCX1 ISC61 // matching Interrupt Sense Config bit1</span>
137 00128 <span class="preprocessor"></span><span class="comment">// PhaseA Port/Pin Configuration</span>
138 00129 <span class="comment">// *** PORTx, DDRx, PINx, and Pxn should all have the same letter for "x" ***</span>
139 00130 <span class="preprocessor">#define ENC2_PHASEA_PORT PORTE // PhaseA port register</span>
140 00131 <span class="preprocessor"></span><span class="preprocessor">#define ENC2_PHASEA_PORTIN PINE // PhaseA port input register</span>
141 00132 <span class="preprocessor"></span><span class="preprocessor">#define ENC2_PHASEA_DDR DDRE // PhaseA port direction register</span>
142 00133 <span class="preprocessor"></span><span class="preprocessor">#define ENC2_PHASEA_PIN PE6 // PhaseA port pin</span>
143 00134 <span class="preprocessor"></span><span class="comment">// Phase B quadrature encoder output should connect to this direction line:</span>
144 00135 <span class="comment">// *** PORTx, DDRx, PINx, and Pxn should all have the same letter for "x" ***</span>
145 00136 <span class="preprocessor">#define ENC2_PHASEB_PORT PORTC // PhaseB port register</span>
146 00137 <span class="preprocessor"></span><span class="preprocessor">#define ENC2_PHASEB_DDR DDRC // PhaseB port direction register</span>
147 00138 <span class="preprocessor"></span><span class="preprocessor">#define ENC2_PHASEB_PORTIN PINC // PhaseB port input register</span>
148 00139 <span class="preprocessor"></span><span class="preprocessor">#define ENC2_PHASEB_PIN PC2 // PhaseB port pin</span>
149 00140 <span class="preprocessor"></span>
150 00141
151 00142 <span class="comment">// -------------------- Encoder 3 connections --------------------</span>
152 00143 <span class="comment">// Phase A quadrature encoder output should connect to this interrupt line:</span>
153 00144 <span class="comment">// *** NOTE: the choice of interrupt pin and port must match the external</span>
154 00145 <span class="comment">// interrupt you are using on your processor. Consult the External Interrupts</span>
155 00146 <span class="comment">// section of your processor's datasheet for more information.</span>
156 00147
157 00148 <span class="comment">// Interrupt Configuration</span>
158 00149 <span class="comment">//#define ENC3_SIGNAL SIG_INTERRUPT7 // Interrupt signal name</span>
159 00150 <span class="preprocessor">#define ENC3_INT INT7 // matching INTx bit in GIMSK/EIMSK</span>
160 00151 <span class="preprocessor"></span><span class="preprocessor">#define ENC3_ICR EICRB // matching Int. Config Register (MCUCR,EICRA/B)</span>
161 00152 <span class="preprocessor"></span><span class="preprocessor">#define ENC3_ISCX0 ISC70 // matching Interrupt Sense Config bit0</span>
162 00153 <span class="preprocessor"></span><span class="preprocessor">#define ENC3_ISCX1 ISC71 // matching Interrupt Sense Config bit1</span>
163 00154 <span class="preprocessor"></span><span class="comment">// PhaseA Port/Pin Configuration</span>
164 00155 <span class="comment">// *** PORTx, DDRx, PINx, and Pxn should all have the same letter for "x" ***</span>
165 00156 <span class="preprocessor">#define ENC3_PHASEA_PORT PORTE // PhaseA port register</span>
166 00157 <span class="preprocessor"></span><span class="preprocessor">#define ENC3_PHASEA_PORTIN PINE // PhaseA port input register</span>
167 00158 <span class="preprocessor"></span><span class="preprocessor">#define ENC3_PHASEA_DDR DDRE // PhaseA port direction register</span>
168 00159 <span class="preprocessor"></span><span class="preprocessor">#define ENC3_PHASEA_PIN PE7 // PhaseA port pin</span>
169 00160 <span class="preprocessor"></span><span class="comment">// Phase B quadrature encoder output should connect to this direction line:</span>
170 00161 <span class="comment">// *** PORTx, DDRx, PINx, and Pxn should all have the same letter for "x" ***</span>
171 00162 <span class="preprocessor">#define ENC3_PHASEB_PORT PORTC // PhaseB port register</span>
172 00163 <span class="preprocessor"></span><span class="preprocessor">#define ENC3_PHASEB_DDR DDRC // PhaseB port direction register</span>
173 00164 <span class="preprocessor"></span><span class="preprocessor">#define ENC3_PHASEB_PORTIN PINC // PhaseB port input register</span>
174 00165 <span class="preprocessor"></span><span class="preprocessor">#define ENC3_PHASEB_PIN PC3 // PhaseB port pin</span>
175 00166 <span class="preprocessor"></span>
176 00167 <span class="preprocessor">#endif</span>
177 </pre></div><hr size="1"><address style="align: right;"><small>Generated on Sun Oct 29 03:41:06 2006 for Procyon AVRlib by&nbsp;
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